1. Field of the Invention
The present invention generally relates to a motion vector correction circuit and method, and more particularly to a circuit for, and a method of, correcting a motion vector determined by the block matching method.
This application claims the priority of the Japanese Patent Application No. 2002-145265 filed on May 20, 2002, the entirety of which is incorporated by reference herein.
2. Description of the Related Art
Heretofore, the TV broadcasting systems have adopted most widely the interlaced scanning or interlacing in which the electron beam is scanned across the screen once every other horizontal scan line. In the interlacing, a field image formed from odd scan lines and a one formed from even scan lines, form together one frame image. An image interlaced with a low frequency incurs a flicker in screen (will be referred to as “screen flicker” hereunder) which will degrade the on-screen image quality.
Also, the interlacing is adopted as the television standard over the world. For example, the PAL (phase alternation by line) system is one of such television standards, prevailing in the European countries. In the PAL system, the field frequency is 50 Hz (a frame image is formed from 25 frames/sec and a field image is formed from 50 fields/sec).
More specifically, to suppress the screen flicker, the PAL system has adopted the field frequency doubling technique which converts a field frequency of 50 Hz into a one of 100 Hz by interpolating or otherwise processing an input image signal.
FIG. 1 shows a block diagram of a field frequency doubler circuit 5 having the field frequency doubling technique applied therein. As shown, the field frequency doubler circuit 5 is formed integrally in a television receiver 6 including an input terminal 64, horizontal/vertical deflection circuit 65 and a CRT 63. The field frequency doubler circuit 5 includes a frequency-doubling converter 55 and a frame memory 52.
The frequency-doubling converter 55 is supplied with a PAL-based image signal of 50 fields/sec from the input terminal 61 and writes the signal to the frame memory 52. The frequency-doubling converter 55 reads the image signal from the frame memory 52 at a speed double that at which the image signal was written. Thus, it is possible to double the frequency of the 50-fields/sec image signal and produce a 100-fields/sec image signal.
The frequency-doubling converter 55 supplies the frequency-doubled image signal to the CRT 63. The CRT 63 will display the supplied image signal on a screen thereof. It should be noted that in the CRT 63, the horizontal and vertical deflection of the image signal is controlled according to a horizontal/vertical sawtooth wave of the frequency double that of the input image signal, produced by the horizontal/vertical deflection circuit 62.
FIGS. 2A and 2B show the relation between each field and pixel position before and after subjected to the frequency-doubling conversion. In FIGS. 2A and 2B, the horizontal axis indicates a time and the vertical axis indicates a vertical position of a pixel. Also, the small blank circle in FIG. 2A indicates an interlaced image signal of 50 fields/sec before subjected to the frequency-doubling conversion, and the small hatched circle in FIG. 2B indicates an interlaced image-signal of 100 fields/sec after subjected to the frequency-doubling conversion.
In the image signal shown in FIG. 2A, fields f1 and field f2 are signals produced from the same frame in a film, and similarly, fields f3 and f4 are signals produced from the frame. Since these image signals are interlaced ones, adjacent fields are different in vertical pixel position from each other. Thus, a new field cannot be produced between fields while maintaining the interlaced state.
On this account, two fields f2′ and f1′ are newly produced between the fields f1 and f2, and two fields f4′ and f3′ are produced between the fields f3 and f4 with no fields being produced between the fields f2 and f3, as shown in FIG. 2B. Say, one frame is formed from four fields, namely, two frames.
Each of the newly formed fields f1′, f2′, . . . may have its own pixel value determined as a mean value, respectively, of three-pixels surrounding that pixel by a median filter or the like in some cases. Also, the new fields f1′, f2′, . . . will have the same contents as the fields f1, f2, . . . , respectively.
That is, the field frequency doubler circuit 5 can increase the number of images per unit time and thus suppress the aforementioned screen flicker by producing two new fields and no new fields alternately between fields of an: image signal before subjected to the frequency-doubling conversion.
FIG. 3A shows the relation between each field and image position with a television signal (will be referred to as “TV signal” hereinafter) being not yet subjected to the frequency-doubling conversion when the image moves horizontally. As shown in FIG. 3A, since the fields f1, f2, f3, . . . belong to independent frames, respectively, the image will appear in another position. The image will move horizontally (to the right) each time it shifts from the field f1 to the field f2, f3 . . . .
By doubling the frequency of the image signal in the TV signal shown in FIG. 3A by the field frequency doubling technique, the same image will appear in the same position when the fields f1 and f2′ form together the same frame as shown in FIG. 3B. Similarly, with the fields f1′ and f2 forming together the same frame, the same image appears in the same position.
Note that since an output image signal regularly forms each field in a 1/100-sec cycle, the image-moving time zone is shorter than the image-stationary time zone and thus the image motion actually appears discontinuous when it is viewed on a CRT. A typical example of the conventional solutions to this “discontinuous image motion” problem is to break an image into blocks, each including a predetermined number of pixels, and determine the similarity between the blocks by the block matching method, for example, in order to determine a motion vector and correct the image motion by shifting pixel positions in each of the blocks according to the motion vector thus determined.
Note the block matching method is a technique to break a basic field 80 into a plurality of basic blocks 101, detect a block most similar to the basic blocks 101 in the basic field 80 from a search block 103 moved within a search range 104 in a reference field 90, and take, as a motion vector, a positional deviation (in direction and magnitude of a motion) between the detected search block 103 and basic block 101, as shown in FIG. 4.
For determination of the above similarity, a difference of each pixel value of the search block 103 from a pixel value corresponding to the basic block 101 is determined, and then an assessment value sum represented by the difference, for example, a difference absolute-value sum, is determined. Next, this procedure is repeated for all the search blocks 103, and a minimum one is determined of assessment value sums, that is, difference value sums. The search block 103 showing the minimum difference sum is taken as showing the highest similarity to the basic block 101, and a vector that can be determined between a pixel at the origin of such a block and a pixel at the origin of the basic block 101 is taken as a motion vector.
FIG. 5 shows a motion correction circuit 7 which uses the block matching method to make motion correction of an image signal having the frequency thereof doubled by the field frequency doubler circuit 5.
As shown, the motion correction circuit 7 includes an image memory 71, motion vector detector 72 and an image shifter 73.
The image memory 71 is sequentially supplied with interlaced image signals having been doubled in frequency by the aforementioned field frequency doubler circuit 5 and one frame of which is composed of four fields each having a field frequency of 100 fields/sec. The image memory 71 will store the supplied image signals in units of a field for one frame. Say, an image signal outputted from the image memory 71 will have a one-frame delay in relation to an image signal supplied to the image memory 71.
The motion vector detector 72 is sequentially supplied with the basic fields 80 for supply to the image memory 71 and with the reference fields 90 supplied from the image memory 71 and delayed one frame in relation to the basic field 80. The motion vector detector 72 extracts the basic block 101 from the basic field 80, and the search block 103 from the reference field 90, and determines a motion vector by the block matching method. The motion vector detector 72 sends the motion vector detected at each pixel or block to the image shifter 73.
The image shifter 73 is supplied with the image signal delayed one frame in relation the input image signal from the image memory 71. The image shifter 73 receives the motion vector from the motion vector detector 72. Also, the image shifter 73 shifts each block of the supplied image signal within the range of the received motion vector and in the direction of a motion vector, and supplies the blocks thus shifted to a CRT 74.
However, the conventional motion correction circuit. 7 adopting the block matching method forms one block from so many pixels as 16×4 pixels for example in order to minimize the load to the entire circuit by reducing the operational amount. Within the block formed from such many pixels, pixels actually move differently from each other. In such a case, if an image is shifted in blocks by the image shifter 73 in the direction of a motion vector, the motion vector will inaccurately be determined in pixels, possibly causing an image quality degradation and operational failure on each area.
In a scene that a person 122 moves to the right before a stationary window 121 as shown in FIG. 6A, for example, when a motion vector is detected for each of gridironed basic blocks 101, the motion vector of the basic blocks 101 including the person 122 is a rightward motion vector 123. On the other hand, the basic blocks 101 not including the person 122 will show zero motion vector.
When a motion correction is done by shifting each block according to such a rightward motion vector 123, however, parts (121a and 121b in FIG. 6B) of the window 121 also moves correspondingly to the motion of the person 122 as shown in FIG. 6B, resulting in a gap 124. Say, in case pixels forming together a block actually move differently from each other, a visually unnatural image will result.